From: Marcin Wojtas Date: Wed, 21 Mar 2018 08:55:47 +0000 (+0100) Subject: gicv2: enable configuring IRQ trigger type X-Git-Url: http://git.openwrt.org/%22https:/collectd.org//%22/%22https:/collectd.org/%22?a=commitdiff_plain;h=4acd900df6275cd724266157e04e2b75d82cf24a;p=project%2Fbcm63xx%2Fatf.git gicv2: enable configuring IRQ trigger type This patch introduces new helper routines that allow configuring the individual IRQs to be edge/level-triggered via GICD_ICFGR registers. This is helpful to modify the default configuration of the non-secure GIC SPI's, which are all set during initialization to be level-sensitive. Change-Id: I23deb4a0381691a686a3cda52405aa1dfd5e56f2 Signed-off-by: Marcin Wojtas Reviewed-by: Kostya Porotchkin --- diff --git a/drivers/arm/gic/v2/gicv2_main.c b/drivers/arm/gic/v2/gicv2_main.c index 7cf6c76e..a355659d 100644 --- a/drivers/arm/gic/v2/gicv2_main.c +++ b/drivers/arm/gic/v2/gicv2_main.c @@ -593,3 +593,12 @@ unsigned int gicv2_set_pmr(unsigned int mask) return old_mask; } + +/******************************************************************************* + * This function updates single interrupt configuration to be level/edge + * triggered + ******************************************************************************/ +void gicv2_interrupt_set_cfg(unsigned int id, unsigned int cfg) +{ + gicd_set_icfgr(driver_data->gicd_base, id, cfg); +} diff --git a/include/drivers/arm/gicv2.h b/include/drivers/arm/gicv2.h index 925d1c25..3472c37d 100644 --- a/include/drivers/arm/gicv2.h +++ b/include/drivers/arm/gicv2.h @@ -191,6 +191,7 @@ void gicv2_set_spi_routing(unsigned int id, int proc_num); void gicv2_set_interrupt_pending(unsigned int id); void gicv2_clear_interrupt_pending(unsigned int id); unsigned int gicv2_set_pmr(unsigned int mask); +void gicv2_interrupt_set_cfg(unsigned int id, unsigned int cfg); #endif /* __ASSEMBLY__ */ #endif /* __GICV2_H__ */